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MrWeng
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Last seen: 5 months 21 hours ago
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About DA14531 hardware reset and FLASH hardware design issues

The attachment is the schematic diagram of DA14531 connecting flash, which I designed, is this connection method correct? If it is not correct, may the DA14531 connect to the flash must be connected as follows and cannot be changed? P0_0 is connected to SI, P0_1 is connected to CS#, P0_3 is connected to SO, and P0_4 is connected to SCLK. If it is connected in the above way, can the reset circuit be designed as the "Reset Circuit" in the schematic, because I have three ICs that need to be reset by hardware, of which the ASIC and the communication transmission module are both low-level reset, and DA14531 is high-power Pin P0_0 is connected to Q1. When SW1 is closed, can DA14531 be reset? Thank you very much for your help and wish you a happy life.

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qifang
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Joined: 2019-12-30 09:02
Hi MrWeng,

Hi MrWeng,

Which kind of products you are going to apply the design? Does it require for a long range broadcast?

In scheme:

1. DCDC converter setup, the capcacitor values are not the same as suggesion.

2. Without matching network of Antenna would lead to a decrease performance on broadcasting.

3. GPIOs could be configured for any function.

4. For the Reset Circuit, POR pin need to pull-down after booting and ready for a pull-high operation for reset. More details we would discuss internally and reply you later.

 

Best regards,

Qifan

MrWeng
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Last seen: 5 months 21 hours ago
Joined: 2020-02-13 08:56
嗨,奇凡:

嗨,奇凡:

我们的产品是通过数据通信模块和蓝牙传输传感器收集的数据。在本产品中,有关蓝牙部分的电路设计,请参考DA14531 QFN / BypassHardware设计实例。在最新设计中,我们更改了复位电路,如附件所示。按下SW3按钮时,MCU和数据通信模块将变为低电平并复位,而DA14531将变为高电平并复位。我不理解“是否需要长距离广播?”的含义。在您的回复中?它是远程空中升级吗?请帮助我们指出新设计中的不合理之处,以便我们进行改进。

 

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qifang
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Last seen: 9 months 5 hours ago
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Joined: 2019-12-30 09:02
Hi Mr Weng,

Hi Mr Weng,

可以将您的产品PCB layout文件,BOM list和scheme文件一并发到我的邮箱里吗?我的邮箱是Qifan.Guo@diasemi.com

也请您在邮件中介绍下您产品的情况和相关代理的信息。

 

Best regards,

Qifan