According to DATASHEET :
"The conversion itself is fast and takes approximately one clock cycle of 16 MHz, though the data handling will require several additional clock cycles, depending on the software code style. The fastest code can handle the data in four clock cycles of 16 MHz, resulting to a highest sampling rate of 16 MHz/5 = 3.3 Msample/s."
register int i,j,k;
k = GP_ADC_RESULT_REG;
j = 0x4C03;
i = GP_ADC_CTRL_REG;
*( volatile uint16*)(i) = j;
k = *( volatile uint16*)(k);
I'm using above code to get the most simple ASM code, maybe the fastest code .
But I have to wait 4 NOP after write to GP_ADC_CTRL_REG to get the right ADC_RESULT.
Could anyone tell me What happened when cpu has been idled for 4 HCLK cycles?
and, what kind of Code style can exceed the top performence of the internal ADC?