After tuning the crystal on my latest batches of boards, I found that I was receiving ASSERT_WARNING in lld_sleep_compensate_func()
// If this Assertion hits then the LP ISR lasts longer than the time
// that has been reserved via LP_ISR_TIME_XTAL32_CYCLES and LP_ISR_TIME_USEC.
if (sleep_lp_cycles && (sleep_lp_cycles < slp_period))
My crystal trim is set to 0xFF, the maximum value / lowest frequency. The warning vanishes when I return the value to the default 0x80, but my BLE frequency error is greater at that point. My tuning process was to check the BLE frequency offset error with a spectrum analyzer and tune the crystal accordingly to minimize error.
Do you have any advice here? Is this a hardware design issue, should I investigate purchasing crystals with additional load capacitance, etc. ? I am using a 32MHz, 6pF crystal with +/-10ppm tolerance and aging (part no. XRCGB32M000F1H00R0).