GPIO drive strength, or rise time & fall time, and sink/source resistance

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tomschreurs
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GPIO drive strength, or rise time & fall time, and sink/source resistance

Hi,

We are using the GPIO pins of a SLG46826 as outputs to drive the gates of 2 FETs. We are currently investigating which FETs to select, and if the SLG46826 is suitable to drive the gates within 1 or a few nanoseconds. In order to do so, we would like to know the drive strength of a single GPIO pin. The SLG46826 datasheet does not seem to provide this information, or am I overlooking something? Alternatively, the rise and fall time for a 300 pF load would be very interesting to know.

In addition, it would be good to know the sink/source resistance of the push-pull transistors in the GPIO output stage.

Please let me know if you can help us with this.

 

Best regards,

Tom

Device: 
Device Number: 
SLG46286V
pavloZ
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Joined: 2018-01-31 12:50
Hi Tom,

Hi Tom,

thank you for your question and sorry for the delay with answer.

Unfortunately we don't have direct data set of rise/fall time vs load capacitance but there are VOH, VOL, IOH, IOL specs (see attached) any you can calculate internal channel resistance and rise/fall time for your specific load.

tomschreurs
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No problem, thank you for the

No problem, thank you for the response. I have actually been looking at those tables and concluded this was not the info I was looking for, but it is. My mistake.

However, one thing I still don't understand: the datasheet says "VOH=2.4 V" for different VDD and VDD2 (even up to VDD = VDD2). See the attached image. I would expect the GPIO high output voltage to be VOH = VDD - 0.2 or something close to that. Why is it always 2.4 V?

Thanks for your help

Tom

 

Attachment: 
pavloZ
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Hi Tom,

Hi Tom,

this table shows maximum load at the pin to keep acceptable output voltage (2.4V) at different VDDs.

 

tomschreurs
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Last seen: 3 years 4 weeks ago
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Clear, I understand. Thank

Clear, I understand. Thank you!