DA7280 LRA detection

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Last seen: 1 month 2 weeks ago
Joined: 2019-11-04 14:05
DA7280 LRA detection

We need to be able to detect when LRA is broken, detached or short circuit. We notice in the documentation that it is possible to detect this and the register IRQ_STATUS1 contains flags for short circuit (STA_OC) and actuator fault status(STA_ACTUATOR) but in case when we detach the LRA we always get only the fleg STA_WARNING active and in register "IRQ_EVENT_WARNING_DIAG" we get bit "E_LIM_DRIVE_ACC" active. This is case even when LRA is attached and resonate. 

Our driver initialize the DA7280 to work in DRO mode and get stream of data only over I2C.

LRA is with specifications:

terminal resistance = 14.3 ohm +-10%

resonant freq= 190 +-10Hz

Voltage range= 2,0+-0,05Vrms

So, how we need to set DA7280 to work properly and get interruipts or check the flags (in register IRQ_STATUS1) when LRA is detach or broken or when is stack and we have over current?

In our cuurent solution manualy we monitor the measured impedance and compare with expected but still we need to have events that rtriger when we have folts with LRA.

Also as verification that LRA working we need to get soome feedback. For this purpose we try to use the actual resonant frequency and from this registers to get feedback that LRA resonate. But looks that we get the actual resonant frequency even in case when LRA is detached. 

How the actual resonant frequency is measured ? Is is needed to have LRA or get signal from the LRA terminals and use that as feedback to measure the actual frequency?


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Last seen: 22 hours 24 min ago
Joined: 2017-09-18 11:54
Hello Vace,

Hello Vace,

Thank you for the post.

Are you able to share the set-up script?

Kind regards,



Last seen: 1 month 2 weeks ago
Joined: 2019-11-04 14:05


We use the DA7280 in our device that we deloping and i can't share the code but i can share the sequence how we set the chip:

init part:
reg TOP_CFG1 = 0x1F
reg FRQ_LRA_PER_H =  H value for 190Hz
reg FRQ_LRA_PER_L =  L value for 190Hz
reg TOP_CTL1 bit STANDBY_EN set
reg IRQ_EVENT1 = 0xff
reg TOP_CTL2 = 0x7F

set DRO mode
reg TOP_CTL1 set bits 0-2 0x1

All other registers has default values.