Simulation problem with F(1) macrocell on SLG46880V

Tue, 2021-02-09 21:29 -- Matthew H.

I'm using the F(1) computational macrocell on a SLG46880V device. It looks like when computations are performed using the cell on inputs coming from the dedicated analog comparator pins, and the outputs of the F(1) block are routed to the FSM transition inputs, the states don't transition correctly in the simulation.

When routing inputs from the general connection matrix it seems to work OK. Please see links to images and exaple file:

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